Advance Computer Architecture Unit 2 (Instruction set architecture, Interleaved memory organization and Backplane Bus System)

Instruction set architecture, CISC Scalar Processors , RISC Scalar Processors, VLIW architecture, Memory Hierarchy, Inclusion, Coherence and Locality, Memory capacity planning. Interleaved memory organization- memory interleaving, pipelined memory access, Bandwidth and Fault Tolerance. Backplane Bus System :Backplane bus specification, Addressing and timing protocols, Arbitration transaction and interrupt.